Data Flow Description with VHDL
Abstract
The purpose of this research is to apply the VHSIC Hardware Description Language (VHDL) to the Data Flow design of a simple W-4 computer. Two of the three description views of VHDL will be discussed in this research. One is the behavior description of the W-4 computer in VHDL, and the other one is the data flow description. Both models will be discussed in detail. The basic concepts and significant features of VHDL will also be shown here with the experimental results. The objective is to verify a data flow design of a computer in terms of its functionality and timing behavior. The data flow model studied here can be synthesized into a structural model in gates.
Document Details
- Document Type
- Technical Report
- Publication Date
- Dec 01, 1990
- Accession Number
- ADA246211
Entities
People
- I-lung Lo
Organizations
- Naval Postgraduate School