Integrated Optical Pipelined Polynomial Processors
Abstract
The purpose of this research was to design, fabricate and characterize a high speed integrated optical pipelined polynomial processor capable of evaluating square roots and solving polynomials up to third order. The Horner rule for polynomial evaluation was applied. The fabricated test devices consisted of a line of alternating adder and multiplier gratings deposited on a single chip of LiNb03. Both adder and multiplier gratings were electro-optic. The coefficients of the polynomial to be evaluated were input as voltages to the adder gratings, while the variables were scanned by applying a- ramp voltage to the multiplier gratings. To evaluate square roots, a second order polynomial was solved. The square root device performed approximately as predicted by the design equations. The third order polynomial evaluator, however, did not perform as predicted, due to a design error. This error was corrected and new devices were fabricated. These new devices performed as predicted and also incorporated significant design improvements, based on the test results of the first devices. Integrated Optics, Square Root Evaluator.
Document Details
- Document Type
- Technical Report
- Publication Date
- Dec 01, 1991
- Accession Number
- ADA248573
Entities
People
- Carl Verber
Organizations
- Georgia Tech