The Data Structure Accelerator Architecture

Abstract

We present a fine grained, massively parallel SIMD architecture called the data structure accelerator and demonstrate its use in a number of problems in computational geometry. This architecture is extremely dense and highly scalable. Systems of 10,000,000 processing elements can be feasibly embedded in work stations. We advocate that this architecture be used in tandem with conventional single sequence machines and with small scale, shared memory multiprocessors. We present a language for programming such heterogeneous systems that smoothly encorporates the SIMD instructions of the data structure accelerator with conventional single sequence code.

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Document Details

Document Type
Technical Report
Publication Date
Dec 01, 1991
Accession Number
ADA250968

Entities

People

  • Richard Zippel

Organizations

  • Cornell University

Tags

Communities of Interest

  • Energy and Power Technologies

DTIC Thesaurus Topics

  • Artificial Intelligence
  • Computations
  • Computer Graphics
  • Computer Programming
  • Computer Science
  • Computers
  • Computing System Architectures
  • Content Addressable Memory
  • Fungi
  • Geometry
  • Image Processing
  • Language
  • Military Research
  • Polygons
  • Preprocessing
  • Simulations
  • Two Dimensional

Fields of Study

  • Computer science

Readers

  • Parallel and Distributed Computing.