An Implementation of a Fault-Tolerant, Multidirectional, Digital Interpolation Beamformer
Abstract
In recent years, methods of incorporating fault-tolerance in computer architectures have shifted from the exclusive focus on traditional modular redundancy techniques to include more efficient, analytical means of achieving the same result. Song and Musicus (1990) describe such a method of analytic fault-tolerance by using a statistical test and minimal redundancy to protect linear operations. Aliphas, Wei, and Musicus (1991) in turn developed a hardware prototype to test this method of statistical fault-tolerance. Using this hardware prototype, a multidirectional, digital interpolation sonar beamformer was implemented. Whereas the original prototype used multiple processors performing the same task on different input data, this implementation uses a different architecture whereby the same data is sent to multiple processors performing different tasks. The digital beamformer relaxes the sampling requirement typically required by sampling the incoming waveform at the Nyquist rate and upsampling to form the beam. Implementing the beamformer on the current architecture offered double fault detection and single fault correction capabilities across a range of look angles. In conjunction with previous results, the results of this thesis verify that the same fault detection and correction algorithm may be used for architectures both with processors performing different operations on the same data, and with processors performing the same operation on different data.
Document Details
- Document Type
- Technical Report
- Publication Date
- Jun 01, 1992
- Accession Number
- ADA252494
Entities
People
- W. B. Bogan
Organizations
- Charles Stark Draper Laboratory