An MCM/Chip Concurrent Engineering Validation

Abstract

A schema to model the information required to do physical design of Multi-Chip Modules was written in the EXPRESS language and mapped into ROSE C++ classes. Software was written in the SKILL language (from Cadence Design Systems) to read and write from/to the Cadence EDGE layout system. C++ code was written to interface the EDGE system to the ROSE C++ classes referred to above. As a result there exists now a full path in and out of the EDGE system and the information stored by ROSE.

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Document Details

Document Type
Technical Report
Publication Date
Jun 30, 1992
Accession Number
ADA253783

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  • Hector Moreno

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