VLSI Design for Reliability - Hot Electron
Abstract
This report describes the accomplishments during the contract period (March 27, 1990 to March 26, 1991) on the computer-aided analysis of CMOS device and circuit degradation due to hot-electron effects. The task involved four subtasks: (1) modeling of the gate oxide degradation in n-channel MOS transistor; (2) modeling of n-channel MOS transistor behavior with localized oxide damage; (3) simulation of gate oxide degradation during long-term circuit operation; (4) determination of overall circuit performance after hot-electron stress. For the modeling of the gate oxide degradation in nMOS transistor, a localized triangular charged density distribution function has been introduced in the drain end of the channel. This model was effective in explaining the local electric potential near the drain, especially on the flatband voltage and also the changes in the local channel electron mobility. To model the behavior of nMOS transistor with local oxide damages, a new one-dimensional I-V equation has been derived and implemented in a generic circuit simulator, iSMILE program. For the modeling of gate oxide degradation process, the rate equations governing the generation of interface states have been implemented for dynamic circuit operating conditions. With these mechanisms implemented, the iSMILE program has been able to simulate the degradation of circuit performances dynamically. For large scale reliability simulation, simpler models have been devised and used in the iDSIM2 program.
Document Details
- Document Type
- Technical Report
- Publication Date
- May 01, 1992
- Accession Number
- ADA253942
Entities
People
- Carlos Diaz
- Ibrahim Hajj
- Li Ping
- Sung-mo Kang
- Yusuf Leblebici
Organizations
- University of Illinois Urbana–Champaign