A Pipelined, High-Precision FFT Architecture

Abstract

This paper presents a highly-integrated, high-precision FFT architecture. A 1.2 um CMOS implementation of this architecture has yielded a 32-bit, 64K-point FFT that operates at a continuous 4-million-samples-per-second data rate. All FFT support functions, including coefficient generation and memory interfacing, are included on-chip. FFT architecture, CMOS implementation.

Open PDF

Document Details

Document Type
Technical Report
Publication Date
Oct 01, 1992
Accession Number
ADA257235

Entities

People

  • G. M. Butler
  • Thomas M. Hopkinson

Organizations

  • MITRE Corporation

Tags

Communities of Interest

  • Advanced Electronics
  • Energy and Power Technologies
  • Materials and Manufacturing Processes

DTIC Thesaurus Topics

  • Abstracts
  • Application-Specific Integrated Circuits
  • Circuits
  • Coefficients
  • Communication Systems
  • Complementary Metal-Oxide Semiconductors
  • Computations
  • Data Rate
  • Demographic Cohorts
  • Digital Signal Processing
  • Frequency
  • Integrated Circuits
  • Lepidoptera
  • Precision
  • Radar
  • Sequences
  • Signal Processing

Fields of Study

  • Engineering

Readers

  • Integrated Circuit Design and Technology.
  • Parallel and Distributed Computing.