Avoidance and Suppression of Compensation Code in a Trace Scheduling Compiler
Abstract
Trace scheduling is an optimization technique that selects a sequence of basic blocks as a trace and schedules the operations from the trace together. If an operation is moved across basic block boundaries, one or more compensation copies may be required in the off-trace code. This paper discusses the generation of compensation code in a trace scheduling compiler and presents techniques for limiting the amount of compensation code: avoidance (restricting code motion so that no compensation code is required) and suppression (analyzing the global flow of the program to detect when a copy is redundant). We evaluate the effectiveness of these techniques based on measurements for the SPEC89 suite and the Livermore Fortran Kernels, using our implementation of trace scheduling for a Multiflow Trace 7/300. The paper compares different compiler models, contrasting the performance of trace scheduling with the performance obtained from typical RISC compilation techniques. There are two key results of this study: First, the amount of compensation code. generated is not large. For the SPEC89 suite, the average code size-increase due to trace scheduling is 6%. Avoidance is more important than suppression, although there are some kernels that benefit significantly from compensation code suppression. Since compensation code is not a major issue, a compiler can be more aggressive in code motion and loop unrolling.
Document Details
- Document Type
- Technical Report
- Publication Date
- Apr 01, 1993
- Accession Number
- ADA265612
Entities
People
- P. G. Lowney
- S. M. Freudenberger
- T. R. Gross
Organizations
- Carnegie Mellon University