The Design of Self-Checking Reduced Instruction Set Computers

Abstract

The overall goal of this project is the design of self-checking computers and fault-tolerant memory systems with low overhead and high reliability. During the research, we focused our research on the determination of more efficient approach for realization of self-checking systems and developing new approach for fault-tolerant memory systems. The research conducted in this project is summarized under five different topics given below. Fifteen papers have been published by the PI under the contract and were listed in Section 6. Abstracts of these papers are included at the end of this report

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Document Details

Document Type
Technical Report
Publication Date
Mar 31, 1993
Accession Number
ADA267012

Entities

People

  • T. R. Rao

Organizations

  • University of Louisiana at Lafayette

Tags

Communities of Interest

  • Air Platforms
  • Materials and Manufacturing Processes
  • Space

DTIC Thesaurus Topics

  • Algebraic Geometry
  • Coding
  • Communication Systems
  • Computer Science
  • Computer-Aided Design
  • Computers
  • Cryptography
  • Decoding
  • Detection
  • Electrical Engineering
  • Engineering
  • Fault Tolerance
  • Geometry
  • High Reliability
  • Information Theory
  • Military Research
  • Reliability

Fields of Study

  • Engineering

Readers

  • Applied Combinatorial Optimization and Logic Circuit Design.
  • Parallel and Distributed Computing.
  • Technical Research and Report Writing.