Single-Event Upset Testing of the Performance Semiconductor 1750A CMOS/ SOS Chip Set
Abstract
Complex computer systems in space are vulnerable to many different environmental effects. One of the most difficult problems is survival under exposure to charged-particle radiation. Microelectronic devices are particularly sensitive to single-event upset-a change in the logic state of a dynamic node or memory cell due to interaction with cosmic rays. For reliable computing in satellite systems, designers must understand the sensitivity of the computer components to single-event upset. A description of tests performed on a MILSTD 1750A compliant microprocessor and peripherals is presented, and the results are used to estimate the single-event upset rate in space for each of the devices.
Document Details
- Document Type
- Technical Report
- Publication Date
- Sep 30, 1993
- Accession Number
- ADA271158
Entities
People
- James D. Kinnison
Organizations
- Johns Hopkins University