A Real-Time Convolution Algorithm and Architecture with Applications in SAR Processing

Abstract

In this report we propose an algorithm that maps a large one- dimensional linear convolution problem onto a small two-dimensional linear convolution problem. We show that this property can be derived from a signal flow representation of a sectioned convolution. The introduction of short length FFT processor elements into the signal flow graph results in a structure that can be efficiently implemented in a dedicated hardware architecture. Although the performance of the architecture is not optimal in terms of computational complexity, the performance in terms of data rate, input data sequence lengths and amount of required hardware is high. The architecture design is illustrated with a configuration suitable for real-time on-board airborne synthetic aperture radar (SAR) processing for the Phased Array Universal Sar (PHARUS), which is currently under development at TNO-FEL.

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Document Details

Document Type
Technical Report
Publication Date
Oct 01, 1993
Accession Number
ADA273817

Entities

People

  • L. H. Bierens

Organizations

  • Netherlands Organisation for Applied Scientific Research

Tags

Communities of Interest

  • Advanced Electronics
  • Materials and Manufacturing Processes
  • Sensors

DTIC Thesaurus Topics

  • Abstracts
  • Airborne
  • Computational Complexity
  • Data Rate
  • Digital Signal Processing
  • Electronics
  • Electronics Laboratories
  • Frequency Domain
  • Phased Arrays
  • Physics
  • Remotely Piloted Vehicles
  • Signal Processing
  • Simulations
  • Standards
  • Synthetic Aperture Radar
  • Time Domain
  • Two Dimensional

Readers

  • Calculus or Mathematical Analysis
  • Image Processing and Computer Vision.
  • Radar Systems Engineering.