Design of a Shared Coherent Cache for a Multiple Channel Architecture
Abstract
The Multiple Channel Architecture (MCA) is a recently proposed computer architecture which uses fiber optic communications to overcome many of the problems associated with interconnection networks. There exists a detailed MCA simulator which faithfully simulates an MCA system, however, the original version of the simulator did not cache shared data. In order to improve the performance of the MCA, a cache coherency protocol was developed and implemented in the simulator. The protocol has two features which are significant: (1) a time-division multiplexed (TDM) communication bus is used for coherency traffic, and (2) the shared data is cached in an independent cache. The modified simulator was then used to test the protocol. Two applications and six test configurations were used throughout the testing. Experiment results showed that the protocol consistently improved system performance. Also, a proof-of-concept experiment indicated that performance improvements can be attained by varying cache parameters between the independent shared and private data caches. Cache design, Cache coherence, Shared memory multiprocessors, Time-division multiplexing.
Document Details
- Document Type
- Technical Report
- Publication Date
- Dec 01, 1993
- Accession Number
- ADA274026
Entities
People
- John A. Reisner
Organizations
- Air Force Institute of Technology