DLTS and Dynamic Transconductance Analysis of Deep-Submicron Fully- Depleted SOI MOSFET's
Abstract
An experimental study of the degradation mechanisms in hot-carrier stressed partially- and fully-depleted SOI(SIMOX) nMOSFET's has been carried out as a function of device (drain) design and fabrication technology, in an effort to develop hot-electron resistant devices that are suitable for space and satellite applications. A multitude of experimental techniques were used for this purpose, including the newly developed sequential front/back channel stressing measurement tech which makes use of the hot-hole injection into the opposite channel that occurs in hot-electron stressed SOI MOSFET's. In addition, copious PISCES simulations were performed for the correct interpretation of the experimental results. It was shown that the hot-carrier degradation is mainly caused by a two step process: a rather slow oxide electron trap generation followed by a fairly fast electron filling of these traps. Moderate amounts of interface state generation may also take place under some bias conditions. The detailed analysis of the hot-hole injection into the opposite gate oxide leads to new insights on the role played by the hot-holes in the overall degradation process.
Document Details
- Document Type
- Technical Report
- Publication Date
- Dec 31, 1993
- Accession Number
- ADA276456
Entities
People
- Dimitris E. Ioannou
Organizations
- George Mason University