Task Allocation and Scheduling for High Level Synthesis
Abstract
This report addresses the development of automated techniques for solving resource allocation problems in the high level synthesis of system designs. These techniques are developed with the objective of supporting the design of highly complex systems that are characterized by an extremely large number of physical components of many different types, with complex interconnections and interdependencies. The purpose of the systems that are developed using these techniques is to implement a set of logical functions that define the overall system behavior. These logical functions can be described as a set of communicating tasks that pass data and control signals from one to another. The set of logical tasks must be mapped onto the physical resources from which the system is constructed. There may be many different ways to map logical system tasks onto the hardware resources. A particular mapping can be scored according to how well it satisfies some overall system design goal such as fault tolerance or rapid response time. The questions as to how to identify optimal mappings that maximize or minimize some design parameter is important. This report represents the results of investigations of the performance of four different techniques for identifying optimal or near-optimal allocations given a particular optimization goal. Resource allocation, Logical model, Implementation model.
Document Details
- Document Type
- Technical Report
- Publication Date
- Mar 21, 1994
- Accession Number
- ADA277570
Entities
People
- Edward A. Cohen
- Eric J. Ogata
Organizations
- Naval Surface Warfare Center