An Approach for Dense Superconducting Memories with Column Sense

Abstract

More than any other obstacle, the lack of a fast, dense random access memory (RAM) has hindered the development of Josephson digital electronics. The principal limitation has been the physical size of the superconductive memory cell which is almost always a loop of superconductor which stores a persistent circulating current as the data. This inductor together with the necessary switches and readout circuitry have typically been between one and two orders of magnitude larger than a semiconductor RAM using the same linewidths. This much lower density has meant that superconductive memories of a given capacity are much larger than the semiconductors alternative; this extra distance and time- of-flight for a memory access cancels the order of magnitude speed advantage the superconductive circuits enjoy. Hypres has proposed, designed, and successfully tested a much smaller memory cell than any other in superconductive electronics

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Document Details

Document Type
Technical Report
Publication Date
Jan 01, 1994
Accession Number
ADA280871

Entities

People

  • Paul Bradley
  • Perng-fei Yuh

Tags

Communities of Interest

  • Advanced Electronics
  • Materials and Manufacturing Processes
  • Sensors

DTIC Thesaurus Topics

  • Access Time
  • Arrays
  • Detectors
  • Digital Signal Processing
  • Electronics
  • Failure Mode And Effect Analysis
  • Josephson Junctions
  • Logic Gates
  • Magnetic Flux
  • Magnetometers
  • Parallel Computing
  • Parallel Processing
  • Processing Equipment
  • Semiconductors
  • Signal Processing
  • Test And Evaluation
  • Test Equipment

Fields of Study

  • Physics

Readers

  • Computer Science/Computer Engineering/Data Science/Digital Signal Processing.
  • Quantum spin resonance or Electron Paramagnetic Resonance spectroscopy.
  • Superconducting Magnet Technology

Technology Areas

  • Microelectronics