Analog Microcircuit Fault Prediction

Abstract

This report documents an effort to determine the feasibility of constructing a realistic fault set for a given analog microcircuit from the information provided by a microcircuit yield simulator program. A methodology for this was developed and demonstrated using a simple PMOS process. The fault set which was generated demonstrates that it is possible to define how process defects affect electrical performance through the use of high level circuit models. The fault set can be ranked by probability of occurrence, and is suitable for use by a circuit simulation program.

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Document Details

Document Type
Technical Report
Publication Date
Apr 01, 1994
Accession Number
ADA281958

Entities

People

  • C. D. Stokes
  • John H. Bordelon
  • Michael J. Willis
  • Richard M. Ingle

Organizations

  • Georgia Tech Research Corporation

Tags

Communities of Interest

  • Advanced Electronics

DTIC Thesaurus Topics

  • Amplifiers
  • Application-Specific Integrated Circuits
  • Circuit Analysis
  • Circuits
  • Complementary Metal-Oxide Semiconductors
  • Electronics Industry
  • Electronics Laboratories
  • Fabrication
  • Integrated Circuits
  • Metal Oxide Semiconductors
  • Microcircuits
  • Probability
  • Semiconductor Manufacturing
  • Semiconductors
  • Simulations
  • Simulators
  • Very Large Scale Integration

Fields of Study

  • Engineering

Readers

  • Computational Modeling and Simulation
  • Fault Tolerant Diagnosis of Black and White Balloon Isolation Tests Using ¥.
  • Neuroscience

Technology Areas

  • Microelectronics