Construction of a Connectionist Network Supercomputer.

Abstract

We have made progress in several areas this quarter. Highlights include: High-level Software: Public release of Sather 1.0, and major progress on pSather. Low-level Software: Design of "bare die" test software to be used for actual chip testing. Applications: A complete speech recognition application running with the Torrent instruction simulator. Network Hardware: A new network interface test chip running at 300 Mbits/second. System Hardware: Completion of the SPERT circuit board design and layout. Analog VLSI: A new communications protocol for connecting multiple chips efficiently. In addition to the cientific and technical work, we had the occasion to present a sum- mary of our work at two events: Dedication day for the new U.C. Berkeley Computer Science building, Soda Hall. (October 24) Over 50 visitors from academia, industry and government stopped by our four exhibits showing highlights of the CNS-1 project. ONR site visit and review. Dave Andes from China Lake, this da included talks, posters and informal discussion.

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Document Details

Document Type
Technical Report
Publication Date
Nov 01, 1994
Accession Number
ADA288439

Entities

Organizations

  • University of California, Berkeley

Tags

Communities of Interest

  • Materials and Manufacturing Processes

DTIC Thesaurus Topics

  • Algorithms
  • Automated Speech Recognition
  • Biomedical Engineering
  • Circuit Boards
  • Communications Protocols
  • Computations
  • Computer Programming
  • Computer Science
  • Computers
  • Engineering
  • Instruction Set Architecture
  • Instructions
  • Language
  • Neural Networks
  • Recognition
  • Simulators
  • Students

Fields of Study

  • Computer science

Readers

  • Academic Conference Management
  • Neural Network Machine Learning.
  • Parallel and Distributed Computing.

Technology Areas

  • AI & ML