Minimizing the Impact of Synchronization Overhead in Parallel Discrete Event Simulations.

Abstract

A Parallel Discrete Event Simulation Coprocessor was designed for conservative synchronization protocols and was implemented in software using some of a parallel computer's nodes to act as coprocessors. The coprocessor was designed to offload synchronization overhead and next event queue management from the nodes running the simulation. The coprocessor was designed to accelerate simulations based on the Simulation Protocol Evaluation on a Concurrent Testbed with ReUsable Modules (SPECTRUM) environment. The research was conducted in three steps: the SPECTRUM environment was ported from an Intel iPSC/2 to an Intel Paragon XP/S, the coprocessor was designed and the simulations were timed, with and without the coprocessor. In some cases, the coprocessor provided up to a 2.5 times speedup.

Open PDF

Document Details

Document Type
Technical Report
Publication Date
Dec 14, 1994
Accession Number
ADA289278

Entities

People

  • Andrew C. Walton

Organizations

  • Air Force Institute of Technology

Tags

Communities of Interest

  • Materials and Manufacturing Processes

DTIC Thesaurus Topics

  • Abstracts
  • Air Force
  • Application Software
  • Communication Networks
  • Computer Programs
  • Computers
  • Computing System Architectures
  • Content Addressable Memory
  • Debugging
  • Diagrams
  • Field Programmable Gate Arrays
  • Instruction Set Architecture
  • Language
  • Lists (Data Structures)
  • Operating Systems
  • Simulations
  • Standards

Fields of Study

  • Computer science

Readers

  • Parallel and Distributed Computing.