A Supercomputer for Neural Computation,

Abstract

The requirement to train large neural networks quickly has prompted the design of a new massively parallel supercomputer using custom VLSI. This design features 128 processing nodes, communicating over a mesh network connected directly to the processor chip. Studies show peak performance in the range of 160 billion arithmetic operations per second. This paper presents the case for custom hardware that combines neural network-specific features with a general programmable machine architecture, and briefly describes the design in progress.

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Document Details

Document Type
Technical Report
Publication Date
Jan 01, 1994
Accession Number
ADA298852

Entities

People

  • James Beck
  • Jerome Feldman
  • John Wawrzynek
  • Krste Asanovic
  • Nelson Morgan

Organizations

  • University of California, Berkeley

Tags

Communities of Interest

  • Energy and Power Technologies

DTIC Thesaurus Topics

  • Algorithms
  • Arithmetic
  • Automated Speech Recognition
  • Bandwidth
  • Central Processing Units
  • Computations
  • Computer Programming
  • Computer Science
  • Computers
  • Computing System Architectures
  • Instruction Set Architecture
  • Language
  • Neural Networks
  • Parallel Processors
  • Simulators
  • Software Development
  • Standards

Fields of Study

  • Physics

Readers

  • Neural Network Machine Learning.
  • Parallel and Distributed Computing.

Technology Areas

  • AI & ML
  • AI & ML - Neural Networks