A Design Study for a New Pattern Recognition Accelerator.

Abstract

The design of a programmable high-performance processor VLSI device is considered for a wide variety of image signal processing applications, including the potential for high-speed pattern recognition (e. g., text character recognition), image analysis, graphics rendering, speech recognition, and other computationally intensive algorithms. The approach is described in detail and its performance is analyzed in the context of two computationally demanding algorithms: linear filtering (e. g., two-dimensional discrete cosine transform), and neural network evaluation for character recognition. Subject to verification by simulation, the design described meets the benchmark objectives of the study.

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Document Details

Document Type
Technical Report
Publication Date
Jan 27, 1995
Accession Number
ADA299062

Tags

Communities of Interest

  • Advanced Electronics
  • C4I
  • Energy and Power Technologies

DTIC Thesaurus Topics

  • Automated Speech Recognition
  • Character Recognition
  • Computations
  • Computer Programming
  • Computer Programs
  • Computers
  • Computing System Architectures
  • Instruction Set Architecture
  • Language
  • Linear Filtering
  • Neural Networks
  • Pattern Recognition
  • Recognition
  • Signal Processing
  • Software Development
  • Software Development Tools
  • Two Dimensional

Fields of Study

  • Computer science
  • Engineering

Readers

  • Computer Vision.
  • Integrated Circuit Design and Technology.
  • Neural Network Machine Learning.

Technology Areas

  • AI & ML
  • AI & ML - Machine Learning Algorithms