High-Performance and Low-Cost Optical Interconnects.
Abstract
This grant developed models of optoelectronic technology to predict manufacturing cost for monolithic and hybrid integration. For the hybrid CMOS-SEED technology, the models predict that modulator yield limits the overall system yield. In addition, the models show that CMOS-SEED is lower cost than the monolithic FET-SEED, though much more expensive than conventional silicon due to the high GaAs epitaxial wafer cost. Hence, CMOS-SEED integration will be limited to small chips on MCMs. The yield models also predict the ratio of optoelectronic interconnects to transistors in a balanced system. in addition, for the same cost systems, we showed the performance. Reliability or architectural advantage necessary to make optoelectronic interconnects competitive with electronics.
Document Details
- Document Type
- Technical Report
- Publication Date
- Aug 31, 1995
- Accession Number
- ADA299094
Entities
People
- Charles Stirk
- John A. Neff
Organizations
- University of Colorado Boulder