Techniques for On-Wafer Reliability Testing for MMICs.
Abstract
Two Compliant Interconnected Structures (CISs) have been designed and fabricated to enable accelerated DC life tests to be performed at the wafer level. The first CIS was fabricated using Kapton polyimide, the second with borosilicate glass. Both structures are capable of providing bias to the GaAs wafers at 24O C for an extended period of time. Three inch wafers that contain process test characterization vehicles, a distribution amplifier, and three stage amplifiers, were used to demonstrate the feasibility of the techniques.
Document Details
- Document Type
- Technical Report
- Publication Date
- Sep 01, 1995
- Accession Number
- ADA299600
Entities
People
- Yoshio Saito