Advanced Workstations Accelerated by Embedded Massively Parallel Computer Modules for Image Processing Applications. Phase 1.
Abstract
This document presents the results of an investigation into the design options for cost-effective IVIUC (Massively Parallel Computer) accelerator modules for workstations, which was carried out as part of phase 1 of the ARPA AVIS program. The main objective of the AVIS program is to develop, demonstrate and benchmark fully functional prototype hardware/software accelerator systems for both workstations or PCs and scalable parallel computers. The program is aiming at a substantial increase in computing performance for image-processing and other high-performance applications by integrating hardware, software, supporting technology and application domain expertise. Teaming between different centers of expertise is therefore strongly encouraged. Each developed system will include all software and hardware necessary to support application-specific demonstrations as well was application-specific and general purpose benchmarking. The ARPA AVIS program is planned in two phases. Phase 1 was executed as a 6-months project. Phase 2 is planned as a multi-team, multi-project 36-months effort. The project presented in this document aims at testing the feasibility and evaluating the Modular-MPC concept as an accelerator for image processing workstations. Carried out as part of the phase 1 effort, the project also aims at identifying the potentials of the modular-MPC concept to contribute substantially in achieving the program goals of phase 2 of the ARPA AVIS project.
Document Details
- Document Type
- Technical Report
- Publication Date
- Mar 21, 1995
- Accession Number
- ADA299734
Entities
People
- Terence W. Barrett