Substrate Coupling Simulation and Analysis for an Industrial Phase-Locked Loop.
Abstract
As the electronics industry aims for newer and better products, designers are pushing technology limits--smaller device sizes, lower supply voltages, and higher digital/analog integration -- while ensuring functionality. Many parasitic effects that were previously ignored can have dramatic effects on circuit operation. The problem substrate coupling has become a significant consideration in advanced mixed-signal design. Current injected into the common chip substrate from fast-switching digital circuits creates a less than optimal environment for precision analog circuits. Substrate current can cause latch-up leaving a circuit useless and causes device threshold voltages to rise which reduces the precision of analog circuitry. Due to the time and monetary constraints of fabrication, detailed simulations are a must to ensure functionality and will help reduce the design life cycle. Many programs are available that can extract designed electrical elements from a layout and place them in a netlist. Such a netlist, with the proper device models, has been sufficient in the past to predict the circuit operation. In mixed-A/D design, this is no longer true. The major draw-backs to 'device-extracted' simulations are that all substrate connections are at ideal voltages, resistance in interconnects is zero, and noise guarding strategies (guard bands, and physical separation) are not modeled, since the netlist provides only a list of devices and how they are connected.
Document Details
- Document Type
- Technical Report
- Publication Date
- Apr 18, 1997
- Accession Number
- ADA323979
Entities
People
- Ryan Welch
Organizations
- Air Force Institute of Technology