HTS Films and Multilayers for Electronics
Abstract
This program established a materials and fundamental device base for an integrated circuit fabrication process for HTS digital electronics based on edge SNS Josephson junctions. The process was qualified by demonstration of small-scale single flux quantum (SFQ) logic circuits fabricated for the first time in an extendible configuration which integrated junctions and HTS groundplanes. Junction materials properties were investigated which affect the reproducibility of critical currents and, ultimately, the scale of circuit integration. Materials properties included the cummulative roughness of multilayer film structures, oxygen mobility in junction electrodes, second-phase precipitates, and crystalline orientation of junction edges. Processing steps investigated in detail included film deposition techniques, parameters, and composition; ion milling angles, gas compositions, and edge profiles; film edge morphology, clenning, and film coverage; groundplanes over and under junctions; groundplane oxidation and magnetic penetration depths; and use of epitaxial buffer layers, protective cap layers, and low-loss insulations. Technology developed under this program was transferred to an Air Force WL/ML program where the junctions were optimized with critical current spreads reduced from 1-sigma values of 30% early in the program to 12% by the program's conclusion. Progress is also reported on tasks which address problems fundamental to the understanding of the superconducting state in HTS films, the application of HTS films in passive microwave circuits, and the development of new superconducting devices.
Document Details
- Document Type
- Technical Report
- Publication Date
- Apr 10, 1997
- Accession Number
- ADA329662
Entities
People
- John Talvacchio