The Self-Synchronous Schemotechnique as a Design Basis for The Fail-Safe Wafer Scale Integration Emergency Computers. Report Number 2.

Abstract

This report results from a contract tasking Institute of Informatics Problems (IPI RAN) as follows: The contractor will prepare a detailed technical report to include the analysis of present state trends in the development of computer systems IC base including a description of requirements for Emergency Computer schemotechnique. his report will also include a discussion of the main principles of self-timing as well as analysis and description.

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Document Details

Document Type
Technical Report
Publication Date
Feb 01, 1997
Accession Number
ADA331552

Entities

People

  • Adolf Filin
  • J. Diachenko
  • J. Rogdestvensky
  • J. Stepchenkov
  • L. Plekhanov

Tags

Communities of Interest

  • Advanced Electronics
  • C4I
  • Energy and Power Technologies
  • Engineered Resilient Systems
  • Ground and Sea Platforms
  • Space

DTIC Thesaurus Topics

  • Algorithms
  • Circuit Analysis
  • Coding
  • Computer Programming
  • Computer Science
  • Computers
  • Contracts
  • Electrical Circuits
  • Emergencies
  • Fail Safe
  • Fault Tolerance
  • Information Processing
  • Language
  • Logic Gates
  • Parallel Computing
  • Processing Equipment
  • Reliability

Fields of Study

  • Computer science

Readers

  • Aerial Delivery - Logistics and Supply Chain Management.
  • Technical Research and Report Writing.