12-Bit High Dynamic Range ADC

Abstract

During this reporting period, detailed layout of the ADC chip continued, and final circuit simulations with major interconnect parasitics are in progress. A program review was held on December 18, 1998. A detailed technical summary of the ADC chip and subsystem design was presented. No major action items were recorded at the program review. Figures 1 through 5 are selected charts from the review presentation material (ADC overview chart, ADC development schedule, ADC chip preliminary floorplan, ADC calibration subsystem block diagram, and ADC requirements versus capabilities table).

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Document Details

Document Type
Technical Report
Publication Date
Jan 15, 1998
Accession Number
ADA336602

Entities

People

  • Bert K. Oyama

Tags

Communities of Interest

  • Energy and Power Technologies

DTIC Thesaurus Topics

  • Calibration
  • Data Rate
  • Dynamic Range
  • Frequency
  • High Dynamic Range
  • Materials
  • Military Research
  • Simulations
  • Sine Waves
  • Waves

Readers

  • Business Analytics
  • Integrated Circuit Design and Technology.