Efficient Correlation Matrix Estimators for FPGA Implementation
Abstract
Effective missile defense requires computer systems with extraordinary real time computing capacity. Parallel architectures are necessary to provide these levels of performance. Alternative architectures can be developed by integrating the design of the numerical algorithm with the computing hardware. One such emerging technology is reconfigurable computing based on Field Programmable Gate Arrays (FPGAs). ISL has developed nonlinear operators that are easily implemented on FPGAs and can be used to implement correlators, matched filters, adaptive filters, and neural networks. In Phase 1 of this SBIR, ISL has implemented the nonlinear correlation estimators in FPGA processors and compared their performance in a standard application: DOA estimation. We have also considered the interconnection on multiple FPGA's and potential applications of such a reconfigurable computer. Based on this investigation, we propose recommendations for future development in a Phase 2 continuation of the present work.
Document Details
- Document Type
- Technical Report
- Publication Date
- Feb 02, 1998
- Accession Number
- ADA337434
Entities
People
- Amir Sarajedini
- J. Doss Halsey
- Paul M. Chan