Concurrent Architecture for VLSI Signal and Image Processing
Abstract
In this project we addressed high speed and low power implementations of various recursive and adaptive digital filters, finite field arithmetic and error control coders, and developed design methodologies for design of folded or time multiplexed architectures for multi-dimensional and multirate systems.
Document Details
- Document Type
- Technical Report
- Publication Date
- Apr 23, 1998
- Accession Number
- ADA344563
Entities
People
- K. K. Parhi
Organizations
- University of Minnesota