Silicon-Based On-Wafer Packaging for High Isolation in High-Density Circuits

Abstract

This project concentrates on the development and demonstration of a novel approach which is appropriate for the development of circuits that require high isolation and high density of integration. In the past ten months, we have extensively investigated the development of a vertically integrated circuit configuration with emphasis on understanding cross talk in various architectures in an effort to minimize it while at the same time circuit efficiency is optimized. The developed architectures for maximum isolation and minimum loss are presently applied towards the design of a three-stage low-noise amplifier. With the successful completion of this LNA (expected by the end of November) we will successfully move towards the development of a K/Ka-Band SSPA/LNA amplifier pair with an isolation between the receiving and transmitting components of better than -80 dB. In both configurations, high isolation between the neighboring circuit components will be achieved by vertically integrating the individual components and by incorporating an effective on-wafer Si micromachined package to further isolate electromagnetically the MMIC components. The performance will be compared to the state-of-the-art to demonstrate excellent electrical response with low cost and high density.

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Document Details

Document Type
Technical Report
Publication Date
Oct 30, 1998
Accession Number
ADA355698

Entities

People

  • Linda P. Katehi

Organizations

  • University of Michigan

Tags

Communities of Interest

  • Advanced Electronics

DTIC Thesaurus Topics

  • Amplifiers
  • Circuits
  • Efficiency
  • Electrical Engineering
  • Fabrication
  • Frequency
  • High Density
  • Integrated Circuits
  • K Band
  • Ka Band
  • Low Noise
  • Low Noise Amplifiers
  • Noise
  • Packaging
  • Shielding
  • Three Dimensional
  • Transmission Lines

Readers

  • Electronics Engineering
  • Nanoscale Plasmonic Nanotechnology
  • Phased Array Antenna Design.