Novel SiC High Power IC Technology
Abstract
The goal of this project is to develop a silicon carbide technology which is similar to that used today for manufacturing silicon power ICs. Silicon high voltage devices are integrated together with CMOS circuits by using the RESURF concept to create lateral structures with high voltage handling capability. In the case of silicon, the RESURF region must have an optimum charge of about 1 x 10(exp 12)/sq cm. Due to the higher breakdown electric field strength of SiC, it can be expected that the optimum dose for SiC devices will also be larger leading to lower on resistances. Our analysis performed using two-dimensional numerical simulations has demonstrated that the optimum RESURF dose for SiC is an order of magnitude greater than that for silicon. We have also found that it is better to use silicon nitride instead of silicon dioxide as the field dielectric to avoid high electric fields. In order to confirm our analysis, we have defined a 11 mask planar process for SiC based upon ion implantation to form all the device structural regions. We have completed the design of a mask set with 47 structures consisting of high voltage rectifiers and power MOSFETs with both inversion channels and accumulation channels together with CMOS transistors. The fabrication of devices has been stating using 4 wafers procured from CREE Research Inc. with 10 micron thick P-type layers grown on P+ substrates.
Document Details
- Document Type
- Technical Report
- Publication Date
- Dec 31, 1999
- Accession Number
- ADA371832
Entities
People
- Aravind Venkateswaran
- Bayant Jayant Baliga
- Pronita Mehrotra
Organizations
- North Carolina State University