Architecutres, Models, Algorithms, and Software Tools for Configurable Computing
Abstract
The Models, Algorithms, and Architectures for Reconfigurable Computing (MAARC) project developed a sound framework for algorithmic configurable computing and for exploiting this technology for embedded signal and image processing applications. Fundamental configurable computing models and performance metrics were developed to evaluate the scalability of configurable hardware. The developed models and the performance metrics were utilized to analyze dynamic reconfiguration and design model based algorithm mapping techniques for signal processing applications. Mapping techniques were developed to identify the core computational kernels of signal processing applications and map them onto configurable hardware. The mapping techniques are efficient and yield significant performance speed ups and logic utilization. An interpretive simulation framework was proposed to analyze and visualize dynamic reconfiguration and the proposed mapping techniques. A prototype of the framework. Dynamically Reconfigurable Systems Interpretive Simulation and Visualization Environment (DRIVE) was developed and demonstrated. A model based compiler framework and compiler optimization technologies were designed targeting reconfigurable platforms.
Document Details
- Document Type
- Technical Report
- Publication Date
- Mar 06, 2000
- Accession Number
- ADA374632
Entities
People
- Viktor K. Prasanna
Organizations
- University of Southern California