Latch-Up Detection and Cancellation in CMOS VLSI Circuits

Abstract

This report looks at the issues involved in designing integrated circuits in bulk-CMOS processes for radiation environments. First, the report describes how radiation can cause transistor threshold to change and leakage currents to increase, and how these effects are mitigated in high-density VLSI processes. Secondly, it describes how radiation can activate parasitic structures endemic to bulk-CMOS processes, causing damaging effect called latch-up. Thirdly, the report describes how latch-up can be detected in an active circuit and cancelled before damage can occur - this is accompanied by successful experimental results with laser induced latch-up. Fourthly, it describes other integrated circuit fabrication technologies, which are naturally immune to latch-up. Finally, the report concludes with recommendations regarding further research that would be needed to validate the concept of bulk-CMOS integrated circuits in radiation environments.

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Document Details

Document Type
Technical Report
Publication Date
Jun 01, 2000
Accession Number
ADA399884

Entities

People

  • Mark N. Martin
  • Philippe O. Pouliquen

Tags

Communities of Interest

  • Advanced Electronics

DTIC Thesaurus Topics

  • Bipolar Junction Transistors
  • Digital Circuits
  • Electronics
  • Electronics Industry
  • Electronics Laboratories
  • Fabrication
  • Field Effect Transistors
  • Integrated Circuits
  • Metal Oxide Semiconductors
  • Modules (Electronics)
  • Power Electronics
  • Radiation
  • Semiconductors
  • Silicon Controlled Rectifiers
  • Spacecraft
  • Test Methods
  • Transistors

Fields of Study

  • Physics

Readers

  • Integrated Circuit Design and Technology.
  • Systems Analysis and Design
  • Theoretical Analysis.

Technology Areas

  • Directed Energy