3-D Computational Sensors for Advanced Low Power Visual Processing

Abstract

This report describes work performed in a collaborative effort between Northeastern University, MIT, and MIT Lincoln Laboratory to develop three-dimensional integrated circuit process technology and designs to enable advanced low power computational image sensors. The 3D development program was funded under DARPA contract DAAK60-96-K-0204 from June 4, 1996 through September 30, 2000. During the course of the program, over twenty people from these three institutions participated in circuit design, algorithm simulation, process development, modeling, and testing. The team produced six publications and three graduate theses. Lincoln Laboratory completed four full 501/CMOS fabrication lots, along with multiple other shorter lots to verify different aspects of the process flow. Fifteen conventional CMOS chips were fabricated through the MOSIS service to test prototype designs, and a programmable demonstration camera system was developed to demonstrate the 3D imager and provide an environment for simulating future systems architectures.

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Document Details

Document Type
Technical Report
Publication Date
Mar 01, 2002
Accession Number
ADA400804

Entities

People

  • Andrew Loomis
  • Craig Keast
  • Craig Lewis
  • James Burns
  • Lisa Mcllrath

Organizations

  • Northeastern University

Tags

Communities of Interest

  • Advanced Electronics

DTIC Thesaurus Topics

  • Algorithms
  • Circuits
  • Complementary Metal-Oxide Semiconductors
  • Computer Vision
  • Contracts
  • Decoding
  • Detection
  • Detectors
  • Fabrication
  • Image Processing
  • Integrated Circuits
  • Measurement
  • Semiconductors
  • Simulations
  • Three Dimensional
  • Three Dimensional Integrated Circuits
  • Two Dimensional

Readers

  • Image Processing and Computer Vision.
  • Integrated Circuit Design and Technology.
  • Technical Research and Report Writing.