Nimble Compiler Environment for Agile Hardware. Volume 1
Abstract
The utilization of a tightly coupled general purpose processor (GPP) and reconfigurable logic array (RLA) has demonstrated appreciable acceleration in some computer intensive applications. Such systems have been very difficult to program though and thus have not been exploited for their benefits. The problem is the lack of an appropriate design environment for system engineers like those typically found in digital signal processing (DSP) embedded system development. The Nimble Compiler research project aims to develop a retargetable design compiler for these adaptable architectures that will exploit the performance gains and hardware whenever it is needed as opposed to being predesigned into hardware. Field updates or modal changes in function are simple. Embedded applications across a wide spectrum of programming language styles will be targeted for support. The resultant environment should accelerate adoption of these computing platforms by making the systems easier to develop and more robust to multiple standards. The Government benefits from this effort by enabling the compute intensive portions of military electronic systems to be smaller, cheaper, and field upgradeable.
Document Details
- Document Type
- Technical Report
- Publication Date
- Oct 01, 2001
- Accession Number
- ADA405143
Entities
People
- Don Macmillen
Organizations
- Synopsys