Programming High Performance Reconfigurable Computers (HPRC)

Abstract

The integration of High Performance Computing with Reconfigurable Computing offers great potential for increased performance and flexibility for a wide range of computing problems. High Performance Computing architectures and Reconfigurable Computing systems have independently demonstrated performance advantages for applications such as digital signal processing and pattern recognition. By exploiting the near hardware specific speed of Reconfigurable Computing systems incorporated into a computer cluster, there is potential for significant performance advantages over software-only or uniprocessor solutions. However, application development barriers exist that will slow the widespread adoption of this technology. This report presents the results of research seeking to overcome one of these barriers, the development of a programming framework for High Performance Reconfigurable Computing systems.

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Document Details

Document Type
Technical Report
Publication Date
Jan 01, 2003
Accession Number
ADA411220

Entities

People

  • Gregory D. Peterson

Tags

Communities of Interest

  • Advanced Electronics
  • Energy and Power Technologies
  • Ground and Sea Platforms
  • Materials and Manufacturing Processes

DTIC Thesaurus Topics

  • Computer Programming
  • Computer Programs
  • Computers
  • Computing System Architectures
  • Embedded Systems
  • Field Programmable Gate Arrays
  • High Performance Computing
  • Image Processing
  • Information Science
  • Instruction Set Architecture
  • Parallel Computing
  • Parallel Processing
  • Signal Processing
  • Software Development
  • Synthetic Aperture Radar
  • Systems Engineering
  • Target Recognition

Fields of Study

  • Computer science

Readers

  • Organizational Process Management (OPM).
  • Parallel and Distributed Computing.

Technology Areas

  • AI & ML
  • AI & ML - DoD AI Strategy