System Design Issues for Wireless Communication in a Multi-Processor Computer: Carrier Acquisition Phase Noise and Modulation Constellation
Abstract
The purpose of this study is to investigate system-level design issues for a wireless communication system that links the central processing units (CPUs) in an advanced multi-processor computer system. The three primary requirements for the wireless communication system are that it must (1) support dynamic reconfigurability of the CPUs, (2) achieve very high data rates (on the order of 100 Gbps system capacity), and (3) achieve extremely low latencies (on the order of 10 nanoseconds). These requirements differ significantly from commercial wireless communication networks for voice and data. The objective of this effort is to identify and quantify the critical communication system design issues and trade-xoffs that will enable the successful achievement of the stringent requirements on dynamic reconfigurability, data rate, and latency.
Document Details
- Document Type
- Technical Report
- Publication Date
- Sep 01, 2003
- Accession Number
- ADA418084
Entities
People
- Brian M. Sadler
- Richard J. Kozick
Organizations
- United States Army Research Laboratory