Configuring Embeddable Adaptive Computing Systems for Multiple Application Domains with Minimal Size, Weight, and Power

Abstract

The advantages of using DSP chips for high-performance embedded signal processing applications have been demonstrated during the past decade. However, it is now apparent that even DSP chips can be overkill for some computations found in common embedded military applications. This project investigates the advantages of integrating configurable hardware together with a multiprocessor DSP/GPP platform. The computational engine of the configurable hardware used in this project was comprised of FPGA chips. A primary goal of our project was to demonstrate that for given computational loads--associated with instances of embedded radar signal processing applications-the total size, weight, and power (SWAP) could be reduced by integrating FPGA-based components as part of the embedded computational platform.

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Document Details

Document Type
Technical Report
Publication Date
Sep 01, 2003
Accession Number
ADA418681

Entities

People

  • John K. Antonio

Organizations

  • Texas Tech University

Tags

Communities of Interest

  • Advanced Electronics
  • Air Platforms
  • Energy and Power Technologies
  • Space

DTIC Thesaurus Topics

  • Application Software
  • Computer Programming
  • Computer Programs
  • Computer Science
  • Computers
  • Digital Signal Processing
  • Embedded Systems
  • Floating Point Operations
  • High Performance Computing
  • Mathematical Programming
  • Organizational Structure
  • Parallel Computing
  • Radar Signals
  • Signal Processing
  • Synthetic Aperture Radar
  • Three Dimensional
  • Unmanned Aerial Vehicles

Fields of Study

  • Computer science

Readers

  • Integrated Circuit Design and Technology.
  • Parallel and Distributed Computing.