DIVA (Data Intensive Architecture)
Abstract
The design development and implementation of a prototype system of a novel computer architecture based on PIM (Processing-In-Memory) technology are presented. The simulator and emulator that were used to develop and evaluate the overall concepts and system are also described. The DIVA system uses PIM-based smart memories to improve the effective processor-memory bandwidth. The DIVA smart memory significantly improves the performance of data- intensive applications over their performance on conventional processor memory systems that suffer from the traditional performance bottleneck caused by the speed gap between high performance microprocessors and DRAMs (Dynamic Random Access Memory) used in main memory. The chips developed for DIVA represent the first smart-memory devices supporting virtual addressing and capable of executing multiple threads of control. DIVA achieves enhanced performance through multiple mechanisms including both coarse-grain and fine-grain parallelism. The simulation results for a broad class of applications run on the DIVA simulator and reported in the literature show significant speedups over conventional processor architectures. Running some of these applications on the prototype hardware has validated these speedups.
Document Details
- Document Type
- Technical Report
- Publication Date
- Jun 01, 2004
- Accession Number
- ADA424942
Entities
People
- Jacqueline Chame
- Jeff Lacoss
- Jeffrey Draper
- John J. Granacki
- Mary Hall
Organizations
- University of Southern California