Morphable Computer Architectures for Highly Energy Aware Systems
Abstract
To achieve a revolutionary reduction in overall power consumption, computing systems must be constructed out of both inherently low-power structures and power-aware or energy-aware hardware and software subsystems. Today's most prevalent practices involve simple frequency scaling and modes where subsystems are merely powered on or off as needed. The energy expended per computational event is not as adjustable, even when lower than peak performance is acceptable. This is true as we move towards memory intensive hierarchical systems (such as register files, caches, SRAM, DRAM, Flash memory) where placement of data within the hierarchy has as much effect on energy expenditures as lowering the logic power. As modern processing systems begin to incorporate bigger and more complex storage hierarchies, it becomes imperative to incorporate techniques for managing such storage hierarchies in a manner that reduces the energy dissipation in the system as a whole. Power Aware architectures will provide a wide dynamic range in adjustable performance/energy settings, run-time software to dynamically manage these settings against real-time constraints, compilation techniques, programmer hints and run-time systems to control these settings or gears . In essence, we need a system that morphs to meet the performance needs of the systems with the least amount of energy.
Document Details
- Document Type
- Technical Report
- Publication Date
- Oct 01, 2004
- Accession Number
- ADA428240
Entities
People
- Jay Brockman
- Kanao Ghose
- Nikzad Toomarian
- Peter Kogge
- Vincent Freeh
Organizations
- University of Notre Dame