A Performance On-Demand Approach to Power-Efficient Computing

Abstract

Complexity-Adaptive Processing (CAP) addresses increasing microprocessor power dissipation through on-the-fly, low-cost hardware adaptation and related circuit techniques so as to better match hardware complexity and speed to application demands. Specific results include adaptive processing elements and hardware/software control techniques, a Multiple Clock Domain processor that saves energy via fine-grain voltage scaling, power-efficient issue queue and register file techniques, a low-leakage dynamic logic circuit and associated control logic for functional units, multi-threaded power and noise reduction, efficient on-chip dc-dc conversion and clock control circuits, low power domino logic and interface circuits, and interconnect width optimization for low power. Overall, a several-fold reduction in power is demonstrated via the collective application of these various techniques.

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Document Details

Document Type
Technical Report
Publication Date
Jul 14, 2004
Accession Number
ADA428305

Entities

People

  • David H. Albonesi
  • Eby G. Friedman
  • Michael L. Scott
  • Sandhya Dwarkadas

Organizations

  • University of Rochester

Tags

DTIC Thesaurus Topics

  • Air Force
  • Air Force Research Laboratories
  • Circuits
  • Computer Architecture
  • Computers
  • Computing System Architectures
  • Dissipation
  • Efficiency
  • Energy Efficiency
  • Frequency
  • Government Procurement
  • Governments
  • Logic
  • Logic Gates
  • Noise
  • Optimization
  • Spacecraft

Fields of Study

  • Engineering

Readers

  • Computational Modeling and Simulation
  • Distributed Systems and Data Platform Development
  • Integrated Circuit Design and Technology.