Smart Memory Systems: Polymorphous Computing Architectures

Abstract

We describe a new universal computing element for future embedded applications. Our polymorphic architecture contains course-grain reconfigurable processors, memory, and network. Each application is compiled into a set of programs for the nodes, and a set of configuration files for the chip. These configuration files optimize the chip for the kinds of tasks that the application demands, creating efficient SIMD engines for the stream-oriented portions of applications and efficient thread machines for the control-intensive portions. To efficiently program our polymorphic architecture, we created a number of abstract machine models that efficiently implement different models of computation and then created a set of virtual machine simulators to allow software development before the hardware was present. These virtual machine interfaces also allow an embedded system to evolve as new hardware or software components are added since they represent a stable, parameterized abstract interface between the hardware and the software.

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Document Details

Document Type
Technical Report
Publication Date
Aug 31, 2004
Accession Number
ADA428584

Entities

People

  • Mark Horowitz

Organizations

  • Stanford University

Tags

Communities of Interest

  • Cyber
  • Energy and Power Technologies
  • Space

DTIC Thesaurus Topics

  • Abstracts
  • Air Force Research Laboratories
  • Computations
  • Computer Architecture
  • Computer Programming
  • Computer Programs
  • Computers
  • Debugging
  • Embedded Systems
  • Instruction Set Architecture
  • Kernels (Operating System)
  • Language
  • Operating Systems
  • Programming Languages
  • Simulations
  • Software Development
  • Virtual Machines

Fields of Study

  • Computer science
  • Engineering

Readers

  • Database Systems and Applications
  • Parallel and Distributed Computing.