Considerations for Algorithm Selection and C Programming Style for the SRC-6E Reconfigurable Computer
Abstract
The architecture and programming environment of the SRC-6E Reconfigurable Computer was presented in the 2002 MAPLD International Conference 1. That paper described how the programmer could trade off chip area for execution speed. In this paper we discuss additional aspects of programming the SRC-6E. In particular we examine classes of algorithms that best benefit from the SRC-6E's architecture. Additionally, we examine how the SRC-6E compiler interprets various C language constructs.
Document Details
- Document Type
- Technical Report
- Publication Date
- Aug 20, 2004
- Accession Number
- ADA428773
Entities
People
- Douglas Fouts
- Russ Duren
Organizations
- Naval Postgraduate School