Metrology for the Sub-100 NM Domain via Fiducial Grids
Abstract
The supported research sought to apply interference lithography technology as a tool for metrology in the sub-100 nm critical dimension (CD) linewidth regime. Semiconductor industry roadmaps show CDs shrinking to under 35 nm within 15 years. This requires mask image placement metrology accuracy of 2 nm by 2014. There are currently no industry length-scale calibration standards at any level of accuracy that may be used to ensure metrology tool accuracy. Instead, the industry relies on various self-referencing schemes which are inaccurate, expensive, time consuming, and ineffective. MIT developed technology to produce image placement metrology standards that achieved sub-5 nm accuracy by the end of this Grant. MIT developed a new tool, called scanning-beam interference lithography (SBIL), which is used to pattern super-accurate grids that will serve as length scale standards. MIT built and tested Phase 1 of the SBIL tool, proving the concept, and then went on to design, build, and test Phase 2 of the tool. The tool was successfully used to pattern 300 mm wafers with 400 nm period gratings which has repeatability of under 3 nanometers.
Document Details
- Document Type
- Technical Report
- Publication Date
- May 01, 2003
- Accession Number
- ADA429303
Entities
People
- Henry I. Smith
- Mark L. Schattenburg
Organizations
- Massachusetts Institute of Technology