The Design of a Frequency Domain Interference Excision Processor Using Field Programmable Gate Arrays
Abstract
This report describes in-house work performed by AFRL which had a two-fold objective: development of a software/hardware testbed and the design of a communications sub-system using this testbed. The report discusses the methodology involved in developing a testbed which utilized Field Programmable Gate Array (FPGA) technology. Several methods of programming FPGAs is discussed (writing Hardware Description Language vs. using schematic-based tools). An interference mitigation filter was subsequently developed using the testbed. The filter utilizes the frequency domain in order to identify and remove stationary and non-stationary narrowband interference from a direct sequence spread spectrum waveform.
Document Details
- Document Type
- Technical Report
- Publication Date
- Jan 01, 2005
- Accession Number
- ADA432369
Entities
People
- Stephen C. Tyler
Organizations
- Rome Laboratory