MONARCH: Next Generation SoC (Supercomputer on a Chip)

Abstract

The MONARCH project is sponsored by DARPA under the Polymorphous Computer Architecture Program. MONARCH is developing a revolutionary chip distinguished from other PCA systems by unifying two radically different architectures into a single flexible VLSI device. MONARCH architecture combines the DIVA PIM architecture, developed by USC/ISI as part of the DARPA-sponsored Data Intensive Program, and HPPS (High Performance Processing System) developed by Raytheon with IRAD funds. We previously presented the motivation for merging these two architectures (HPEC 2002). We have since developed the detailed specifications for the micro architecture of the MONARCH chip and also the software environment, run time system and on-chip communication network. Furthermore, we have completed the evaluation of several benchmarks and we have shown that the MONARCH architecture is capable of achieving a very high stability factor that allows the MONARCH architecture to process data at near peak throughput speeds.

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Document Details

Document Type
Technical Report
Publication Date
Feb 01, 2005
Accession Number
ADA432944

Entities

People

  • John J. Granacki

Organizations

  • University of Southern California

Tags

Communities of Interest

  • Energy and Power Technologies
  • Materials and Manufacturing Processes

DTIC Thesaurus Topics

  • Abstracts
  • Communication Networks
  • Computer Architecture
  • Computer Programming
  • Computers
  • Computing Devices
  • Computing System Architectures
  • Data Sets
  • Demographic Cohorts
  • Efficiency
  • Energy Efficiency
  • Environment
  • Information Science
  • Simulators
  • Software Development
  • Supercomputers
  • Throughput

Fields of Study

  • Computer science

Readers

  • Marine Propulsion Engineering and Naval Architecture
  • Parallel and Distributed Computing.
  • Software Engineering.