Development of Buffer Layer Technologies for LWIR and VLWIR HgCdTe Integration on Si

Abstract

This program proposed to develop manufacturable, cost-effective buffer layer technologies that would allow either hybrid or monolithic integration of LWIR and VLWIR HgCdTe infrared focal plane arrays with standard Si-based integrated circuits. Previous efforts were thwarted by the large lattice mismatch that prevents the growth of high-quality HgCdTe epilayers directly onto a Si wafer. Three buffer layer technologies are proposed, each of which provides unique solutions to the issues preventing the realization of LWIR HgCdTe on Si. These technologies are based on the following: (1) the use of ultra thin GeSi films as obedient buffers, and (2) wafer bonding of lattice-matched buffers. Obedient buffers -- A method of forming Ge(x)Si(1-x) films by thermal oxidation of Ge(exp +)-implanted Si was further developed. The process involves the segregation of the implanted Ge during oxidation to form a distinct Ge-rich layer at the oxide interface. The composition of the segregated layer can be altered by varying the oxidation conditions as a result of the kinetic competition between oxidation and the interdiffusion of the segregated layer with the underlying Si substrate. Rutherford backscattering results show that the Ge-rich layer becomes more dilute at higher oxidation temperatures. Below a critical thickness, the segregated film forms pseudomorphically on the underlying Si. However, the observed critical thickness greatly exceeds the value predicted for pseudomorphic growth. Dislocation-free relaxation of the Ge(x)Si(1-x) films formed within a Si-on-insulator (SOI) wafer is achieved with a unique vacancy injection technique. The encapsulation of the segregated film by the oxide layers in the SOI ensures that the injected vacancies remain within the volume of the film to relax the strain and are not lost to the underlying substrate. Wafer Bonding -- Wafer bonding offers the ability to integrate dissimilar and orientationally differing layers on the substrate of choice7

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Document Details

Document Type
Technical Report
Publication Date
May 03, 2005
Accession Number
ADA433760

Entities

People

  • Terry D. Golding

Organizations

  • University of North Texas

Tags

Communities of Interest

  • Advanced Electronics

DTIC Thesaurus Topics

  • Electronics
  • Encapsulation
  • Epitaxial Growth
  • Focal Plane Arrays
  • Focal Planes
  • Integrated Circuits
  • Ion Implantation
  • Low Temperature
  • Materials
  • Military Research
  • Molecular Beams
  • Optical Properties
  • Orientation (Direction)
  • Oxidation
  • Scientists
  • Substrates
  • Surface Roughness

Fields of Study

  • Materials science

Readers

  • Semiconductor Device Technology
  • Systems Analysis and Design
  • Thin Film Deposition Science.

Technology Areas

  • Microelectronics
  • Microelectronics - Graphene