A Switch-Level Model and Simulator for MOS Digital Systems

Abstract

The switch-level model describes the logical behavior of digital systems implemented in metal oxide semiconductor (MOS) technology. In this model a network consist of a set of nodes connected by transistor "switches" with each node having a state 0.1. or X (for invalid or uninitialized), and each transistor having a state :open","closed", or "indeterminate". Many characteristics of MOS circuits can be modeled accurately, including : rationed, complementary, and precharged logic; dynamic and static storage; (bidirectional) pass transistors; busses; charge sharing; and sneak paths. In this paper we present a formal development of the switch-level model starting from a description of circuit behavior in term of switch graphs. Then we describe an algorithm for a logic simulator based on the switch-level model which computes the new state of the network by solving a set of equations in a simple, discrete algebra. This algorithm has been implemented in the simulator MOSSIM II and has been used to simulate circuits containing over 10,000 transistors. By developing a formal theory of MOS logic circuits, we have achieved a greater degree of generality and accuracy than is found in other logic simulators for MOS.

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Document Details

Document Type
Technical Report
Publication Date
Jul 28, 1983
Accession Number
ADA444290

Entities

People

  • Randal Bryant

Organizations

  • California Institute of Technology

Tags

Communities of Interest

  • Advanced Electronics

DTIC Thesaurus Topics

  • Abstracts
  • Algorithms
  • Circuits
  • Compound Semiconductors
  • Information Operations
  • Logic
  • Logic Gates
  • Metal Oxide Semiconductors
  • Metal Oxides
  • Networks
  • Semiconductors
  • Simulators
  • Standards
  • Transistors

Readers

  • Applied Combinatorial Optimization and Logic Circuit Design.
  • Integrated Circuit Design and Technology.
  • Mathematical Modeling and Probability Theory.

Technology Areas

  • Microelectronics