Low Power 256K MRAM Design
Abstract
A low power Magnetoresistive Random Access Memory (MRAM), that uses a novel Sandwich-Spin Dependent Tunneling (SSDT) memory bit is described. The SSDT bit combines a sandwich storage structure with tunneling magnetoresistance readout. A single, bi-polar write current is used to write the bit. A write select transistor, in the memory cell, selects a single bit for writing - thereby eliminating half-select conditions. Antiferromagnetic coupling in the sandwich film minimizes the required switching field, leading to low write currents - as low as 4 mA seen in 2 micrometers devices and 0.8 mA predicted for an 0.6 micrometers device. A two bit, differential cell, has been used to design a 256k memory.
Document Details
- Document Type
- Technical Report
- Publication Date
- Jan 01, 2006
- Accession Number
- ADA449576
Entities
People
- Robert Sinclair
- Russell Beech