BSAR Computational Analysis and Proposed Mapping. Revision 1

Abstract

This report details the MIT Lincoln Laboratory computational performance analysis of the CBASS BSAR. We describe: (1) the BSAR algorithm, in both the original mode and the new, default mode; (2) the algorithm's computational workload for both nodes; (3) the 12-Hammerhead DR on which the BSAR algorithm is executed; (4) a proposed mapping of the algorithm onto the DR; (5) an estimated execution time for the algorithm in both modes using the proposed mapping; (6) a memory usage analysis. Our analysis indicates that the DR will be able to handle the BSAR algorithm in both the original and the new, default modes with sufficient spare processor capacity. Furthermore, there is sufficient memory for the various input, intermediate, and output data products, although some of the memory margin will be consumed in the original algorithm mode.

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Document Details

Document Type
Technical Report
Publication Date
Nov 30, 2006
Accession Number
ADA459834

Entities

People

  • M. Arakawa

Organizations

  • Massachusetts Institute of Technology

Tags

Communities of Interest

  • Advanced Electronics
  • Materials and Manufacturing Processes
  • Weapons Technologies

DTIC Thesaurus Topics

  • Access Time
  • Automatic Gain Control
  • Beam Forming
  • Broadband
  • Clocks
  • Computations
  • Data Transmission
  • Detection
  • Fast Fourier Transforms
  • Field Programmable Gate Arrays
  • Floating Point Operations
  • Frequency
  • Frequency Domain
  • Instructions
  • Signal Processing
  • Throughput
  • Workload

Fields of Study

  • Computer science

Readers

  • Computer Science/Computer Engineering/Data Science/Digital Signal Processing.
  • Distributed Systems and Data Platform Development
  • Wave Propagation and Nonlinear Chaotic Dynamics.